How MATADOR Automates Tsetlin Machine System on Chip Designs

MATADOR, a tool for edge AI SoC design using Tsetlin Machines

Authors: include Tousif Rahman, Gang Mao, Rishad Shafik, Alex Yakovlev

Published: 2024, Microsystems Group: Newcastle University

Discover MATADOR, a revolutionary tool that automates the design generation of System-on-Chip (SoC) for Tsetlin Machines, tailored specifically for edge applications, as detailed in this insightful video presentation.

Presented by Tousif Rahman from Literal Labs and the Microsystems Group at Newcastle University, the video introduces MATADOR — a design automation tool that facilitates the deployment of Tsetlin Machine algorithms in edge computing devices. The core motivation behind MATADOR is to harness the benefits of AI-enabled sensors at edge nodes, which include reduced network bandwidth needs, enhanced data security, and improved energy consumption over cloud-based solutions.

MATADOR stands out by leveraging the inherently bitwise operations of Tsetlin Machines, which avoid the precision losses typical in conventional neural network models. This approach not only simplifies the architectural design but also significantly reduces the design search space, making the automation process more straightforward and efficient.

The video demonstrates how MATADOR takes learned logic expressions from Tsetlin Machines and generates custom compute units for each class, integrating these with a SoC to create highly efficient inference accelerators. These accelerators are optimized for speed and resource frugality, using edge-specific hardware like low-power embedded FPGAs.

MATADOR exemplifies a significant advancement in ML application deployment at the edge, providing a tool that automates the entire process from machine learning training to hardware integration. This innovation is set to accelerate the development of edge-specific AI applications, making Tsetlin Machine accelerators a viable and efficient option for real-world implementation.